Questions List:
1. Compare the Performance aspects of I/O and Power Planning?
2. What are cell compilers how they play an important role in logic cells
3. Write an ALP for multiplexer in verilog modeling using always statement
4. Explain in detail about boundary scan test
5. Design a Full Adder with Mixed Design Modeling using Verilog?
NOTE: 1. This LTC is for G.R.K. Prasad Sir class only.
2. Any four of these five are to be written.
2. Any four of these five are to be written.
3. The LTC is to be written in the LTC Notes only.
4. Date of Submission is on Tuesday (22-11-2016).